User's Manual

148603 Project Document
148603 Specification and Integration Guide
Copyright 2012 Motorola Solutions, Inc. 20110610-i 20 of 36
Confidential Material – Disclosure Strictly Prohibited. "Ni ckel Leucochroic Puffin"
5.3. External Slow Clock (32K) Requirement
The supported digital slow clock is a free-running clock of 32.768 KHz which is supplied
from an external clock source. It shall be connected to the SLOW_CLK pin and is a
digital square-wave signal in the range of 0-1.8V Nom. See Table 2 above on page 10
for module pin number. All four core functions share a single input. Refer to * If the
available slow clock source does not meet the 40 ppm requirement, there are two options;
• Use the fast clock for the FM_TX functionality. This is configured using a vendor-specific command to switch to Fref
operation after enabling the FM core with the slow clock source.
• Enable clock error calibration in the FM core to compensate for the clock source error. The calibration can be done using a
known vendor-input clock error or intrinsically to the core (self-calibration).
Table 6 - Slow Clock Requirements below for slow clock specifications. SLOW_CLK is
a "fail-safe" input and can support an external clock voltage on the module pin even
when no power is supplied to the module. See Error! Reference source not found.
Error! Reference source not found. for the SLOW_CLK input requirements.
Characteristics
Condition
Sym
Min.
Typ.
Max.
Unit
Input slow clock frequency
32768
Hz
Input slow clock accuracy
(Initial + temp + aging)
WLAN, BT
±250
ppm
GPS
±200
FM_RX
±150
FM_TX *
±40
Input transition time Tr/Tf -10% to 90%
Tr/Tf
100
ns
Frequency input duty cycle
15
50
85
%
Input voltage limits
Square wave, DC-coupled
Vih
0.65 x VIO
VIO
Vpeak
Vil
0
0.35 x VIO
Input impedance
1
MΩ
Input capacitance
5
pF
Phase noise
1 kHz , 10 kHz
-125
dBc/Hz
Jitter
Integrated over 300 - 15000 Hz
1Hz / 0.5nS
* If the available slow clock source does not meet the 40 ppm requirement, there are two options;
• Use the fast clock for the FM_TX functionality. This is configured using a vendor-specific command to switch to Fref
operation after enabling the FM core with the slow clock source.
• Enable clock error calibration in the FM core to compensate for the clock source error. The calibration can be done using a
known vendor-input clock error or intrinsically to the core (self-calibration).
Table 6 - Slow Clock Requirements