User's Manual

148603 Project Document

148603 Specification and Integration Guide

Confidential Material – Disclosure Strictly Prohibited. "Ni ckel Leucochroic Puffin"

2.3. GPS

The GPS hardware interface shares the BT UART hardware interface as described in

Section Error! Reference source not found.. On power up, the core is disabled by

default and will remain in this state until host enables it by setting BT_GPS_FM_EN and

writing Vendor Specific commands to turn on GPS via the shared transport.

2.4. Power Sub-System

The 148603 requires two external voltage sources a VBAT=3.3V nominal and a

VIO=1.8V nominal. The VBAT is used to supply voltage to the SoC, FEM, and antenna

selection control logic. The VIO is used to supply voltage to the SoC and provide level

detection to the antenna switch control logic. The SoC incorporates an internal 1.8V

that is used to supply the internal Soc 1.8V rail as well as power to the 26MHz TCXO.

2.5. Internal Clock Frequencies

The 148603 has on-module TCXO operating at 26MHz

2.5.1. WLAN

WLAN has an Zero-IF architecture and thus the LO operates at ~10GHz that is divided

by 2 for 5G Band operation and divided by 4 for 2.4GHz Band operation.

2.5.2. BT

The TCXO is used to produce the relevant BT channel, between 2.402G to 2.480GHz.

The ADPLL produces the frequencies between 4.804GHz to 4.96GHz, which divided by

2 to provide the BT frequencies.

2.5.3. GPS

The LO frequency for GPS is 1579.5MHz.

2.5.4. FM

The FM IP generates the FM station frequency from the divided FREF clock or by the

32K clock. It is generated by the Synthesizer and ADPLL. The FM channel frequency

band is between 76-108MHz (Europe and Japan).

NOTE: FM is DISABLED.