Specifications

5-14 Reference Guide
Model No.
Running Head
Interface Card User Screens and Settings Interface Card
You can set up signaling conversion for all types of voice circuits from the Signaling
Conversion Table Screen, which is shown in Figure 5-10. To go to that screen, press “
b
” in the
Interface Card Main Screen (
taBs
command).
You can accept the default bit pattern changes, or you can set a different ABCD signaling bit
pattern and insert it in the table. Each voice circuit type is represented by two columns that
correspond to ITU-T to ANSI conversion (C->A) and ANSI to ITU-T (A->C) conversion.
Figure 5-10. Signaling Conversion Table Screen
For example, an E&M circuit in the “0101” state (shown in the far-left ABCD column of the
screen) will send
0101
as the ABCD bits from the ITU-T end of the circuit. The ANSI end will
receive and convert those bits to
1111
. In the opposite direction, the signaling bit sequence will
be sent as
1111
from the ANSI end and converted to
0101
at the ITU-T end. However, you can
manually override the received ABCD bit pattern at either end.
The E&M portion of the Signaling Conversion Table Screen is also used for FXSDN,
FXODN, PLAR-D3, DPO, and DPT signaling. The FXS/FXSC portion is used for
FXO-to-FXS signaling, and the FXO/FXOC portion is used for FXS-to-FXO signaling. The
PLAR portion is used for PLAR-D4 to PLAR and MRD.
Table 5-8 lists the actions you can perform from the Signaling Conversion Table Screen. These
actions appear in the bottom highlighted line of the screen.
Node_1 | IF INF+M T1E1x8 Rev A0-0 Ser 01103 | 12-31-99 14:33
E&M FXS/FXSC FXO/FXOC PLAR
ABCD C->A A->C C->A A->C C->A A->C C->A A->C
0000 0000 1101 0101 0101 0101 0101 1111 0101
0001 0000 1101 0101 0101 0101 0101 1111 0101
0010 0000 1101 0101 1101 0101 1101 1111 1101
0011 0000 1101 0101 1101 0101 1101 1111 1101
0100 0000 1101 0101 1101 0101 1101 1111 1101
0101 1111 1101 0000 1101 1111 1101 0000 1101
0110 0000 1101 0101 1101 0101 1101 1111 1101
0111 0000 1101 0101 1101 0101 1101 1111 1101
1000 0000 1101 0101 1101 0101 1101 1111 1101
1001 0000 1101 0101 0101 0101 1101 1111 1101
1010 0000 1101 0101 0101 0101 1101 1111 1101
1011 0000 1101 0101 1101 0101 1101 1111 1101
1100 0000 1101 0101 1101 0101 1101 1111 1101
1101 0000 0101 0101 0101 0101 1101 1111 1101
1110 0000 1101 0101 1101 0101 1101 1111 1101
1111 0000 0101 0101 0101 0101 1101 1111 1101
Enter Conv. bits: 0000
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