Hardware Guide

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FIBOCOM SQ808-NA Hardware

Guide

Version: V1.0.0

Date: 2020-04-27

Summary of content (78 pages)

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FIBOCOM SQ808-NA Hardware Guide Version: V1.0.
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Applicability Type NO. Product Model Description 1 SQ808-NA 2GB+16GB eMCP, Applicable to North America Reproduction forbidden without Fibocom Wireless Inc. written authorization - All Rights Reserved.
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Copyright Copyright ©2020 Fibocom Wireless Inc. All rights reserved. Without the prior written permission of the copyright holder, any company or individual is prohibited to excerpt, copy any part of or the entire document, or transmit the document in any form. Notice The document is subject to update from time to time owing to the product version upgrade or other reasons. Unless otherwise specified, the document only serves as the user guide.
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Contents Figure Index .........................................................................................................................7 Table Index ...........................................................................................................................8 1 2 3 Introduction .................................................................................................................13 1.1 Instruction ...........................................................................
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3.13 LCM............................................................................................................................ 42 3.14 TP .............................................................................................................................. 44 3.15 Camera ...................................................................................................................... 44 3.15.1 Rear Camera ..............................................................................
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8 9 Electrical, Reliability and RF Performance................................................................66 8.1 Recommended Parameters ........................................................................................ 66 8.2 Power Consumption ................................................................................................... 66 8.3 RF Transmit Power ..................................................................................................... 67 8.
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Figure Index Figure 2-1 Pin assignment .................................................................................................................. 19 Figure 3-1 VBAT voltage drop............................................................................................................. 29 Figure 3-2 Power supply reference design ......................................................................................... 30 Figure 3-3 VRTC reference design ...............................................
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Table Index Table 2-1 Support bands ..................................................................................................................... 15 Table 2-2 Main performance ............................................................................................................... 16 Table 2-3 I/O description parameters ................................................................................................. 20 Table 2-4 Pin description..................................................
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Table 6-3 BT rate and version information .......................................................................................... 63 Table 6-4 BT performance index ......................................................................................................... 64 Table 7-1 GNSS positioning performance .......................................................................................... 65 Table 8-1 Recommended Parameters ......................................................................
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Federal Communication Commission Interference Statement This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: （1） This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules.
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Innovation, Science and Economic Development Statement         This device complies with Industry Canada license-exempt RSS standard(s). Operation is subject to the following two conditions: 1) this device may not cause interference, and 2) this device must accept any interference, including interference that may cause undesired operation of the device. Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence.
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science et du développement économique.Description généraleLa recommandation S11 est inférieure à - 10 dB,Le gain d 'antenne maximum autorisé est indiqué dans le tableau ci - après.Les types d 'antennes qui ne répondent pas à ces exigences sont strictement interdits d' utilisation avec le dispositif.
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1 Introduction 1.1 Instruction This document describes the electrical characteristics, RF performance, structure size, application environment, etc. of the module. With the assistance of this document and other instructions, the developers can quickly understand the hardware functions of the module and develop products. 1.2 Reference Standards ⚫ 3GPP TS 51.010-1 V10.5.0: Mobile Station (MS) conformance specification; Part 1: Conformance specification ⚫ 3GPP TS 34.121-1 V10.8.
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⚫ IEEE 802.11-2007 WLAN MAC and PHY, June 2007 ⚫ Bluetooth Radio Frequency TSS and TP Specification 1.2/2.0/2.0+EDR/2.1/2.1+EDR/3.0/3.0+HS, August 6, 2009 ⚫ Bluetooth Low Energy RF PHY Test Specification, RF-PHY.TS/4.0.0, December 15, 2009 1.3 Related Document FIBOCOM SQ808 SMT Design Guide Reproduction forbidden without Fibocom Wireless Inc. written authorization - All Rights Reserved.
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2 Product Overview 2.1 Product Introduction The smart module integrates core components such as Baseband, eMCP, PMU, Transceiver, PA. It supports long distance multi-mode communication such as FDD/TDD-LTE, WCDMA, and WIFI/BT shortdistance radio transmission technology, as well as GNSS wireless positioning technology. The module is embedded with Android operating system and supports various interfaces such as MIPI/USB/UART/SPI/I2C. It is the optimal solution for the core system of wireless smart products.
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Table 2-2 Main performance Performance Description Power DC 3.5~4.2V, typical voltage: 3.8V Arm Cortex-A53 microprocessor cores, Application CPU 64-bit processor, Quad-core (1.3 GHz) 2GB LPDDR3+16 GB eMMC Memory SQ808-NA flash Class 4 (32.5dBm±1dB) for GSM850 Class 1 (29.5dBm±1dB) for PCS 1900 Class E2 (24dBm+4/-5dB) for GSM850 8-PSK Power class Class E2 (23dBm+4.5/-5dB) for PCS 1900 8-PSK Class 3 (23.
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Performance Description Support 2.4G and 5G WLAN wireless communication, WLAN features support 802.11a, 802.11b, 802.11g, 802.11n and 802.11ac, the maximum rate up to 433Mbps Bluetooth features BT4.2 (BR/EDR+BLE) Satellite positioning GPS Text and PDU modes Point-to-Point MO and MT SMS SMS cell broadcast SMS storage: stored in the module by default LCD interface 4 lane MIPI_DSI interfaces Support maximum HD+ 60fps (1440 * 720) Two 4 lane MIPI_CSI interface, up to 2.
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Performance I2C interface Description Multiple I2C interfaces, can be used for peripherals such as TP, Camera, and Sensor ADC interface Universal ADC RTC Support Antenna interface TRX antenna, DRX antenna, GNSS antenna, WIFI/BT antenna Dimension: 41mm×41mm×2.80mm Physical characteristics Encapsulation: 148 LCC pin + 84 LGA pin Weight: About 9.
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2.
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Table 2-3 I/O description parameters Symbol Description I/O Input/Output DI Digital Input DO Digital Output PI Power Input PO Power Output AI Analog Input AO Analog Output OD Open Drain Descriptions of the module pins are presented in the following table: Table 2-4 Pin description Pin Name Pin # I/O Pin Description Note VBAT 4,5,6 PI Main power input NA VRTC 126 PI/PO RTC clock power supply NA VREG_L5_1P8 129 PO 1.8V voltage output NA VREG_L6_1P8 122 PO 1.
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Pin Name Pin # I/O Pin Description Note 3, 7, 10, 13, 15,27, 36, 51, 62, 69, 74, 77, 79, 93, 95, 119, 121, 131, 133, 136, 143, 146, 149, 152, GND 153, 154, 155, 156, 157, 160, 161, 162, 163, 164, GND 51Pins 170, 171, 176, 177, 178, 182, 190, 191, 196, 197, 204, 205, 228, 229, 230, 231, 232 Battery supply interface Connect the pin with VBAT_ID 2 AI Battery ID GND through 10K resistor If choose external charge mode please PWR_CHARGE_SEL 124 DI Charge select connect this pin to GND and if cho
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Pin Name Pin # I/O Pin Description Note UIM1_RESET 23 DO (U)SIM card 1 reset NA UIM1_DETECT 22 DI (U)SIM card 1 plug detection Disabled by default VREG_L15_UIM2 21 PO (U)SIM card 2 power supply NA UIM2_DATA 20 I/O (U)SIM card 2 data NA UIM2_CLK 19 DO (U)SIM card 2 clock NA UIM2_RESET 18 DO (U)SIM card 2 reset signal NA UIM2_DETECT 17 DI (U)SIM card 2 plug detection Disabled by default SD_CARD_DET_N 35 DI SD card detection Active low by default SDC2_DATA3 34 I/O
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Pin Name Pin # I/O Pin Description Note CAM_I2C_SDA 85 OD I2C data cable CAM use only CAM2_I2C_SCL 206 OD I2C clock CAM use only CAM2_I2C_SDA 208 OD I2C data cable CAM use only VBUS_USB_IN 8,9 PI 5V input NA USB_DP 12 AI/AO USB HS data+ NA USB_ DM 11 AI/AO USB HS data- NA USB_HS_ID 16 DI USB OTG detection pin NA UART2_TX 90 DO UART2 data transmission UART2_RX 89 DI UART2 data reception Debug serial RX UART6_TX 45 DO UART6 data transmission NA UART6_RX 4
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Pin Name Pin # I/O Pin Description Note MIPI_DSI0_CLK_P 53 AO MIPI display serial interface NA MIPI_DSI0_CLK_N 52 AO MIPI_DSI0_LANE0_P 55 AO MIPI_DSI0_LANE0_N 54 AO MIPI_DSI0_LANE1_P 57 AO MIPI_DSI0_LANE1_N 56 AO MIPI_DSI0_LANE2_P 59 AO MIPI_DSI0_LANE2_N 58 AO MIPI_DSI0_LANE3_P 61 AO MIPI_DSI0_LANE3_N 60 AO LCD_RST_N 49 DO LCD reset signal NA WLED_PWM 44 DO LCD backlight PWM control NA LCD_TE 50 DI LCD synchronization signal Keep floating if unused TS_INT_
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Pin Name Pin # I/O Pin Description Note MIPI_CSI0_CLK_N 63 AI MIPI rear camera serial NA MIPI_CSI0_LANE0_P 66 AI MIPI_CSI0_LANE0_N 65 AI MIPI_CSI0_LANE1_P 68 AI MIPI_CSI0_LANE1_N 67 AI MIPI_CSI0_LANE2_P 181 AI MIPI_CSI0_LANE2_N 183 AI MIPI_CSI0_LANE3_P 180 AI MIPI_CSI0_LANE3_N 179 AI CAM0_MCLK 75 DO Rear camera main clock NA CAM0_RST_N 80 DO Rear camera reset signal NA CAM0_PWD_N 81 DO Rear camera power down NA MIPI_CSI1_CLK_P 71 AI MIPI front camera seria
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Pin Name Pin # I/O Pin Description Note MIPI_CSI1_LANE1_N 185 AI MIPI_CSI1_LANE2_P 186 AI MIPI_CSI1_LANE2_N 187 AI MIPI_CSI1_LANE3_P 188 AI MIPI_CSI1_LANE3_N 189 AI CAM1_MCLK 76 DO Front camera main clock NA CAM1_RST_N 82 DO Front camera reset signal NA CAM1_PWD_N 83 DO Front camera power down NA CAM2_MCLK 213 DO Depth camera MCLK NA CAM2_RST_N 214 DO Depth camera reset NA CAM2_PWD_N 215 DO Depth camera power down NA SPKR_DRV_P 148 AO Speaker amp+output
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Pin Name Pin # I/O Pin Description Note CDC_HS_DET 140 AI Headset detection NA MIC2_P 142 AI Headset mic NA GND_MIC 141 AI Headphone MIC GND NA MIC1_N 144 AI Main mic- NA MIC1_P 145 AI Main mic+ NA ANT_TRX 94 I/O 2G/3G/4G main antenna NA ANT_DRX 132 AI Diversity reception antenna NA ANT-WIFI/BT 78 AI/AO WIFI/BT antenna NA ANT_GNSS 120 AI GNSS antenna NA ALSP_INT_N 106 DI Ambient light sensor interrupt NA MAG_INT_N 107 DI Magnetic sensor interrupt NA
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Pin Name Pin # I/O Pin Description Note GPIO_19 118 I/O B-PD:nppukp GPIO_25 105 I/O B-PD:nppukp GPIO_33 39 I/O Tuner control GPIO_34 40 I/O B-PD:nppukp GPIO_47 86 I/O B-PD:nppukp GPIO_48 219 I/O B-PD:nppukp GPIO_59 110 I/O B-PD:nppukp GPIO_61 38 I/O B-PD:nppukp GPIO_62 111 I/O B-PD:nppukp GPIO_63 112 I/O B-PD:nppukp GPIO_68 210 I/O B-PD:nppukp GPIO_93 96 I/O B-PD:nppukp GPIO_97 100 I/O B-PD:nppukp GPIO_98 101 I/O B-PD:nppukp GPIO_104 103 I/O B-
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Pin Name Pin # I/O Pin Description Note 198, 199, 200, 201, 202, 203, 211, 212, 216, 217, 223, 225, 226, 227 Note： The pin with “Boot configuration” remark cannot be pulled-up externally. 3 Application Interface 3.1 Power Supply The module provides 3 VBAT pins for connecting to external power supply source. The input range of power is 3.5V~4.2V and the recommended value is 3.8V. The performance of the power supply such as its load capacity, ripple etc.
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Table 3-1 Power supply Parameter Minimum Value Recommended Value Maximum Value Unit VBAT (DC) 3.5 3.8 4.2 V The reference design of power supply is shown as the following figure: VBAT M odule + 220uF 220uF 1uF 100nF 39pF 33pF 18pF 8.2pF 6.
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Table 3-3 VRTC parameter Parameter Minimum Typical Maximum Unit VRTC output voltage 2.5 3.1 3.2 V VRTC input voltage (clock works well) 2.0 3.0 3.25 V VRTC input current (clock works well) - 6 - uA The reference design of VRTC pin powered by external power source is shown as the following figure: M odule V R TC + C oin cell Figure 3-3 VRTC reference design 3.1.3 Power Output The module provides multiple power outputs for peripheral circuits.
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3.2 Control Signal 3.2.1 Power On/Off The module provides one-way power on/off control signal to module’s power on/off, restart and sleep/wake up. Its pin definition is shown as follow table： Table 3-5 Power on/off signal Pin Name Pin # I/O KEY_PWR_N 123 DI 3.2.1.1 Description Note Active low, can be used to power on/off, restart, NA sleep/wakeup the module Power On After module’s VBAT pin is powered, pull down KEY_PWR_N pin for 2~8s can trigger module power on.
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K E Y _P W R _N 2s T ＜8s 100pF 10K 47K Figure 3-5 OC drive power on reference design The power on timing is shown as follows: VB AT 2s T ＜8s KEY_PWR_N VREG_L5_1P8 Other VREGs Figure 3-6 Power on timing 3.2.1.2 Power Off Normal power off: when module in operating mode, pull down KEY_PWR_N 500mS and then release it, user interface will display selection box (select power off or restart). Force power off: pull down KEY_PWR_N pin for 8~15s module will be forced power off.
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Note： When the system is abnormal or shutdown, can use force power off method to power off the module, please use normal method generally, otherwise may cause data loss and other anomalies. 3.2.1.3 Sleep/Wake up When module in standby mode, pull down KEY_PWR_N 100mS and then release it, module will enter sleep mode. When module in sleep mode, pull down KEY_PWR_N 100mS and then release it, module can be waked up. 3.2.
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C onnector M odule U S B _D M DM U S B _D P DP U S B _ID ID 1uF V BU S 100nF U S B _V B U S GND Figure 3-8 USB2.0 reference design M odule G P IO DC-DC V BA T C onnector U S B _D M DM U S B _D P DP U S B _ID ID 1uF V BU S 100nF U S B _V B U S GND Figure 3-9 USB2.0 reference design (with OTG function) Note: 1) Please chose junction capacitor less than 1pF for ESD protection device of USB_DP/DM. 2) USB_DP and USB_DM are high-speed differential signal.
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⚫ USB2.0 differential signal cable is laid on the signal layer nearest to the ground, with well grounded. 3) Pease choose Boost DC-DC that satisfy output is 5V when support OTG function. 3.4 UART The module defines three UART ports，all are 1.8V voltage domain.
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3.5 SPI The module provide one master only SPI interface, the pin definition is as follows: Table 3-8 SPI pin definition Pin Name Pin # I/O Description Note SPI7_CLK 113 DO SPI clock NA SPI7_CS 114 DO SPI chip select NA SPI7_MISO 115 DI SPI Master input slave output NA SPI7_MOSI 116 DO SPI Master output slave input NA 3.6 (U)SIM The module supports two (U)SIM cards, dual-SIM dual-standby single-active and both support hot plug (Disabled by default).
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V R E G _L5_1P 8 M odule C onnector 22 R U IM _V D D VC C 10 K 22 R U IM _D A T A D A TA 22 R D ET U IM _D E T E C T 22 R C LK U IM _C LK 22 R U IM _R S T 2.2uF R ST 18pF ESD Figure 3-11 (U)SIM reference design (U)SIM card design notice: 1) The length from the (U)SIM card holder to module should less than 100mm. 2) The layout and routing of the (U)SIM card must be kept away from EMI interference sources such as RF antenna and digital switch power.
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SDC interface reference design is shown as the following figure: LDO11_SD LD O 5_1V 8 100MHz_120R 100nF 4.7uF 100K C onnector VD D 22 R S D _D A T A 3 D A T3 22 R S D _D A T A 2 D A T2 22 R D A T1 S D _D A T A 1 S D _D A T A 0 S D _C LK 22 R D A T0 22 R C LK 22 R S D _C M D CMD 1K S D _C A R D _D E T D E T E C T IV E NC NC NC NC NC NC Figure 3-12 SDC reference design SDC design notice: 1) VREG_L11_SDC_PWR is the SD card peripheral driving power and can provide about 600mA current.
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Pin Name Pin # I/O Description GPIO_47 86 B-PD:nppukp NO GPIO_48 219 B-PD:nppukp YES GPIO_59 110 B-PD:nppukp YES GPIO_61 38 B-PD:nppukp YES GPIO_62 111 B-PD:nppukp YES GPIO_63 112 B-PD:nppukp YES GPIO_68 210 B-PD:nppukp NO GPIO_93 96 B-PD:nppukp NO GPIO_97 100 B-PD:nppukp YES GPIO_98 101 B-PD:nppukp NO GPIO_104 103 B-PD:nppukp NO GPIO_106 102 B-PD:nppukp NO GPIO_116 220 B-PD:nppukp NO GPIO_117 221 B-PD:nppukp NO Note： B: Bidirectional digital with
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Pin Name Pin # I/O Description Note TS_I2C_SCL 41 OD Main touch panel I2C clock NA TS_I2C_SDA 150,158 OD Main touch panel I2C data NA CAM_I2C_SCL 84 OD Camera I2C clock CAM use only CAM_I2C_SDA 85 OD Camera I2C data CAM use only CAM2_I2C_SCL 206 OD Camera I2C clock CAM use only CAM2_I2C_SDA 208 OD Camera I2C data CAM use only Note: When I2C has more than one peripheral, please ensure the uniqueness of every peripheral address.
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Pin Name Pin # I/O VBAT_SNS 125 AI VBAT_THERM 127 AI 3.12 Description Note Main battery voltage sense Sampling from VBAT Connect the pin with GND through Battery thermistor 47K resistor Vibration Motor Driver Interface Table 3-15 Motor driver interface definition Pin Name Pin # I/O Description Note VIB_DRV_N 37 PO Vibration motor driver Connect with Vibration motor- 3.
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Pin Name Pin # I/O Description Note MIPI_DSI0_LANE3_N 60 AO MIPI display serial interface Lane 3- NA LCD_RST_N 49 DO Main LCD reset NA PWM 44 DO LCD backlight PWM control NA LCD_TE 50 DI LCD tearing effect NA The reference design of LCD interface circuit is shown as follows: VREG_L6_1P8 100nF 100nF 2.
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cable should keep 3 times trace width from other cables. 3.14 TP The module provides one I2C interface can be used to connect the touch panel and it provides power, interrupt, reset pins.
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Table 3-18 Camera interface pin definition Pin Name Pin # I/O 4 lane+4 lane 4 lane+2 lane+1 lane VREG_L6_1P8 122 PO DOVDD power supply DOVDD power supply VREG_L16_2P8 222 PO AVDD supply AVDD power supply VREG_L10_2P85 224 PO Camera focus motor drive AFVDD power supply Camera focus motor drive AFVDD power supply MIPI_CSI0_CLK_P 64 AO MIPI rear camera serial interface clock+ MIPI rear camera serial interface clock+ MIPI_CSI0_CLK_N 63 AO MIPI rear camera serial interface clock+ MIP
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Pin Name Pin # I/O 4 lane+4 lane 4 lane+2 lane+1 lane MIPI_CSI1_LANE0_N 72 AI MIPI front camera serial interface lane 0- MIPI front camera serial interface lane 0- MIPI_CSI1_LANE1_P 184 AI MIPI front camera serial interface lane 1+ MIPI front camera serial interface lane 1+ MIPI_CSI1_LANE1_N 185 AI MIPI front camera serial interface lane 1- MIPI front camera serial interface lane 1- MIPI_CSI1_LANE2_P 186 AI MIPI front camera serial interface lane 2+ MIPI depth camera serial interface
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VREG_L10_2P8 V R E G _L16_2V 8 V R E G _L6_1P 8 V C C _1P 2 V R E G _L6_1P 8 DOVDD 2.2K 2.
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VREG_L6_1P8 V R E G _L16_2P 8 V C C _1P 2 V R E G _L6_1P 8 2.2K 2.
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3.15.3 Depth Camera Pin definition of depth camera is shown as follows: V R E G _L6_1P 8 V R E G _L16_2P 8 CAM2_CLK AVDD MCLK CAM2_PWD_N PWD CAM2_RST_N RST CAM2_I2C_SCL SCL CAM2_I2C_SDA SDA MIPI_CSI1_LN3_P EM I MIPI_CSI1_LN3_N MIPI_CSI1_LN2_P EM I MIPI_CSI1_LN2_N CLK_P C A M C onnector 100nF 10uF 2.2K Module 2.2K V R E G _L6_1P 8 CLK_N DAT0_P DAT0_N Figure 3-18 Depth camera reference design 3.15.
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3.16 Sensor The module supports I2C to communicate with sensors, such as accelerometer sensor, ambient light sensor and magnetic sensor etc.
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Design notice: 1) The module has MIC bias circuit internally, and no external addition is required; 2) The SPK is configured as class D amplifier output, cannot connect with amplifier externally, it is recommended to connect 8ohms speakers. Note that the route width must meet the power rating requirements; If an external audio amplifier is required, please use the output of headphone as the input of external audio amplifier; 3) The reference ground of the headphone has already grounded in the module.
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M odule 0R 10 0pF REC_P 0R 33 pF 33 pF REC_M Figure 3-20 Earpiece reference design Headphone Circuit Design 3.17.3 Module 33 pF MIC2_P CDC_HPH_L CDC_HPH_R 20 K HPH_DET 0R 33 pF 33 pF CDC_HPH_REF 0R Figure 3-21 Headphone circuit design Note： Recommendation TVS for headphone to prevent system level issue, please choose bidirectional device. 3.17.4 Speaker Circuit Design Reproduction forbidden without Fibocom Wireless Inc. written authorization - All Rights Reserved.
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M odule 10 0pF S P K R _D R V _P 33 pF 33 pF S P K R _D R V _N Figure 3-22 Speaker circuit design 3.18 Force Download Interface The module provides FORCE_USB_BOOT pin as an emergency download interface. Connect the FORCE_USB_BOOT with VREG_L5_1P8 pin when power on, the module can enter the emergency download mode which is used for the final processing mode when the product fails to power on or run normally.
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4 Antenna Interface The module supports 2G/3G/4G main antenna/diversity reception antenna, WIFI/BT antenna and GNSS antenna. 4.1 TRX/DRX Antenna The module provides two 2G/3G/4G antenna interfaces. The ANT_TRX is used to receive and transmit RF signal, the ANT_DRX is used for diversity reception. Table 4-1 TRX/DRX antenna interface definition Pin Name Pin # I/O Description Note ANT_TRX 94 AI/AO 2G/3G/4G antenna NA ANT_DRX 132 AI Diversity reception antenna NA 4.1.
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Mode LTE TDD Band Tx (MHz) Rx (MHz) Band 13 777~787 746~756 Band 17 704~716 734~746 Band 25 1850~1915 1930~1995 Band 26 814~849 859~894 Band 66 1710~1780 2110~2180 Band 41 2496~2690 2496~2690 4.1.2 Circuit Reference Design When use the module, it is necessary to connect the antenna pin with the RF connector or antenna feed point on the main board via an RF trace. Microstrip trace is recommended for RF trace, with insertion loss within 0.2dB and impedance at 50ohms.
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Pin Name Pin # I/O Description Note ANT-WIFI/BT 78 AI/AO WIFI/BT antenna NA 4.2.1 Operating Frequency Table 4-4 WIFI/BT operating frequency Mode WIFI BT4.2 Frequency Unit 2412-2462 MHz 5150-5350 MHz 5470~5850 MHz 2402~2480 MHz 4.2.2 WIFI/BT Antenna Reference Design WIFI/BT antenna reference design is shown as follows： M odule W IFI/B T _A ntenna 0R A N T_W IFI/B T NC NC Figure 4-2 WIFI/BT antenna reference design 4.3 GNSS Antenna GNSS supports GPS.
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4.3.1 Operating Frequency Table 4-6 GNSS operating frequency Mode Frequency Unit GPS 1575.42±1.023 MHz 4.3.2 GNSS Antenna Reference Design The module has a built-in LNA. The passive antenna is used in the design of the device. Microstrip trace is recommended for the GNSS RF route, with insertion loss within 0.2dB and impedance at 50ohms.
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The power of the active antenna is fed from the antenna's signal line through a 56nH inductor. Common active antennas supply power from 3.3V to 5.0V. The active antenna itself consumes very little power, but requires a stable and clean power supply. It is recommended that a high-performance LDO be used to power the antenna. The active antenna gain requirement is <17db. If the gain is> 17db, the reserved π-type matching needs to be used to increase the attenuation network. 4.
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5 RF PCB Layout Design Guide For user PCB, the characteristic impedance of all RF signal traces should be within 50ohms. In general, the impedance of the RF signal trace is determined by the dielectric constant of the material, the trace width (W), the ground clearance (S) and the height of the reference ground plane (H). The control of the characteristic impedance of the PCB usually in two ways: microstrip trace and coplanar waveguide.
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Figure 5-3 Four-layer PCB coplanar waveguide structure (reference ground layer3) Figure 5-4 Four-layer PCB coplanar waveguide structure (reference ground layer4) In the design of RF antenna interface circuit, in order to ensure good performance and reliability of the RF signal, it is recommended to observe the following principles: ➢ The impedance simulation tool should be used to accurately control the RF signal cable at 50ohms impedance.
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6 WIFI and Bluetooth 6.1 WIFI Overview The module supports 2.4G and 5G WLAN wireless communications and 802.11a, 802.11b, 802.11g, 802.11n, 802.11ac standards, with a maximum speed up to 433Mbps. Its characteristics are as follows: ➢ Support Wake-on-WLAN (WoWLAN) ➢ Support ad hoc mode ➢ Support WAPI ➢ Support AP mode ➢ Support Wi-Fi Direct ➢ Support MCS 0-7 for HT20 and HT40 (If you need to open 2.
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Frequency Mode Date Rate Bandwidth(MHz) TX Power(dBm) 6Mbs 20 19.0±3 54Mbps 20 16.0±3 MCS0 20 18.0±3 MCS7 20 15.0±3 MCS0 40 17.0±3 MCS7 40 14.0±3 MCS0 20 17.0±3 MCS8 20 14.0±3 MCS0 40 16.0±3 MCS9 40 13.0±3 MCS0 80 15.0±3 MCS9 80 12.0±3 802.11a 802.11n 5G 802.11ac Table 6-2 WIFI RX sensitivity Frequency Mode Date Rate Bandwidth (MHz) Sensitivity(dBm) 2) 1Mbps 20 -92.0 11Mbps 20 -88.0 6Mbps 20 -89.0 54Mbps 20 -72.0 MCS0 20 -85.0 MCS7 20 -70.
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Frequency Mode Date Rate Bandwidth (MHz) Sensitivity(dBm) 2) 54Mbps 20 -72.0 MCS0 20 -86.0 MCS7 20 -70.0 MCS0 40 -83.0 MCS7 40 -67.0 MCS0 20 -88.0 MCS8 20 -66.0 MCS0 40 -85.0 MCS9 40 -61.0 MCS0 80 -82.0 MCS9 80 -55.0 802.11n 802.11ac Note: 2) The sensitivity here is a typical value 6.3 Bluetooth Overview The module supports BT4.2 (BR/EDR+BLE) standards. The modulation method supports GFSK, 8DPSK and π/4-DQPSK.BR/EDR.
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Version Date Rate Throughput Note BT2.0+EDR 3Mbit/s > 80Kbit/s NA BT3.0+HS 24Mbit/s Refer to 3.0+HS NA BT4.2 LE 24Mbit/s Refer to 4.2 LE NA 6.4 Bluetooth Performance Table 6-4 BT performance index Type DH-5 2-DH5 3-DH5 Unit Transmitter 10±2.5 9±2.5 8±2.5 dBm Sensitivity -88 -88 -84 dBm Reproduction forbidden without Fibocom Wireless Inc. written authorization - All Rights Reserved.
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7 GNSS 7.1 Overview The smart module supports multiple positioning systems including GPS. The module is embedded with LNA which can effectively improve the sensitivity of GNSS. 7.2 GNSS Performance Test condition：3.8V power supply, environment temperature 25°C. Table 7-1 GNSS positioning performance Parameter Description Type Result Unit Acquisition -145 dBm Tracking -156 dBm -130dBm 39 dB-Hz Cold Start 44 s Warm Start 40 s Hot Start 2.
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8 Electrical, Reliability and RF Performance 8.1 Recommended Parameters Table 8-1 Recommended Parameters Parameter Min Normal Max Unit VBAT 3.5 3.8 4.2 V USB_VBUS 4.75 5 5.25 V VRTC 2.0 3.0 3.25 V Operating Temperature -25 25 75 ℃ Storage Temperature -40 25 85 ℃ 8.2 Power Consumption Test condition：3.8V power supply, environment temperature 25°C Table 8-2 Power consumption Parameter Description Condition Typical Unit Ioff Power Off Power Off 15 uA GSM MFRMS=5 3.
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GSM850@Gamma=6（1UL/1DL） 170 EGPRS data GSM850@Gamma=6（4UL/1DL） 478 RMS Current PCS1900@Gamma=5（1UL/1DL） 188 PCS1900@Gamma=5（4UL/1DL） 466 Band2@ max power 625 Band4@ max power 570 Band5@ max power 595 Band2@max power(10MHz,1RB) 650 Band4@max power(10MHz,1RB) 660 Band5@max power(10MHz,1RB) 695 Band7@max power(10MHz,1RB) 755 FDD data Band12@max power(10MHz,1RB) 630 RMS Current Band13@max power(10MHz,1RB) 660 Band17@max power(10MHz,1RB) 630 Band25@max power(10MHz,1RB) 640 Band2
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Mode Band Max Power(dBm) Min Power(dBm) 850（8PSK） 24+4/-5 5±5 1900（8PSK） 23+4.5/-5 0±5 GSM Band 2 WCDMA Band 4 Band 5 Band 2 Band 4 Band 5 Band 7 Band 12 LTE FDD Band 13 Band 17 Band 25 Band 26 Band 66 LTE TDD Band 41 23.5±1 23.5±1 23.5±1 23±1 23±1 23±1 23±1 23±1 23±1 23±1 23±1 23±1 23±1 23±1 < -49 < -49 < -49 < -39 < -39 < -39 < -39 < -39 < -39 < -39 < -39 < -39 <-39 <-39 8.
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Mode Band Main DIV Main+DIV 3GPP Requirement Unit 850 -109 -109 -111 -102 dBm 1900 -107.5 -108 -110.5 -102 dBm Band II -109 -110.5 -112.5 -104.7 dBm Band IV -109 -110 -112 -106.7 dBm Band V -110 -110.5 -113 -104.7 dBm Band 2 -98 -98.5 -101 -94.3 dBm Band 4 -96.5 -98 -99 -96.3 dBm Band 5 -98 -98 -101 -94.3 dBm Band 7 -96.5 -96 -100.5 -94.3 dBm Band 12 -97.5 -98.5 -100.5 -93.3 dBm Band 13 -97.5 -98.5 -100.5 -93.3 dBm Band 17 -97.5 -98.
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9 Structural Specification 9.1 Product Appearance The module product appearance is shown in the figure: Figure 9-1 Module product appearance Reproduction forbidden without Fibocom Wireless Inc. written authorization - All Rights Reserved.
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9.2 Structural Dimension The structural dimension of the module is shown in the following figure: Figure 9-2 Structural dimension 9.3 PCB Soldering Pad and Stencil Design PCB soldering pad and stencil design please refer to FIBOCOM SQ808 SMT Design Guide. Reproduction forbidden without Fibocom Wireless Inc. written authorization - All Rights Reserved.
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10 Production and Storage 10.1 SMT SMT production process parameters and related requirements please refer to FIBOCOM SQ808 SMT Design Guide. 10.2 Carrier and Storage Carrier and storage please refer to FIBOCOM SQ808 SMT Design Guide. Reproduction forbidden without Fibocom Wireless Inc. written authorization - All Rights Reserved.
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11 Appendixes A.
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Term Definition RTC Real Time Clock Rx Receive SMS Short Message Service TE Terminal Equipment TX Transmitting Direction TDD Time Division Duplexing UART Universal Asynchronous Receiver & Transmitter UMTS Universal Mobile Telecommunications System URC Unsolicited Result Code (U)SIM (Universal) Subscriber Identity Module USSD Unstructured Supplementary Service Data Vmax Maximum Voltage Value Vnorm Normal Voltage Value Vmin Minimum Voltage Value VIHmax Maximum Input High Level V
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B. GPRS Encoding Scheme Table 11-2 GPRS encoding scheme Encoding Method CS-1 CS-2 CS-3 CS-4 Rate 1/2 2/3 3/4 1 USF 3 3 3 3 Pre-coded USF 3 6 6 12 Radio Block excl.USF and BCS 181 268 312 428 BCS 40 16 16 16 Tail 4 4 4 - Coded Bits 456 588 676 456 Punctured Bits 0 132 220 - Data Rate Kb/s 9.05 13.4 15.6 21.4 Reproduction forbidden without Fibocom Wireless Inc. written authorization - All Rights Reserved.
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C. GPRS Multislot In the GPRS standard, 29 types of GPRS multislot modes are defined and can be used by mobile stations. The multislot class defines the maximum rate of uplink and downlink. The expression is 3+1 or 2+2, the first number represents the number of downlink timeslots and the second number represents the number of uplink timeslots. Active timeslot represents the total number of timeslots that the GPRS device can use for both uplink and downlink communications.
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D. EDGE Modulation and Encoding Method Table 11-4 EDGE modulation and encoding method Coding Scheme Modulation Coding Family 1 Timeslot 2 Timeslot 4 Timeslot CS-1 GMSK / 9.05kbps 18.1kbps 36.2kbps CS-2 GMSK / 13.4kbps 26.8kbps 53.6kbps CS-3 GMSK / 15.6kbps 31.2kbps 62.4kbps CS-4 GMSK / 21.4kbps 42.8kbps 85.6kbps MCS-1 GMSK C 8.80kbps 17.6kbps 35.2kbps MCS-2 GMSK B 11.2kbps 22.4kbps 44.8kbps MCS-3 GMSK A 14.8kbps 29.6kbps 59.2kbps MCS-4 GMSK C 17.6kbps 35.