User's Manual

Table Of Contents
Hardware Development Guide of Module Product
All Rights reserved, No Spreading abroad without Permission of ZTEWelink 23
错误!未找到
用源。
ZM8620_V2
TTL-
RS232
level
translator
SP3238
MAX3238
ZM8620_
V2
module
1.8V
-TTL
level
translator
NLSX5014MUTAG
UART_DCD
UART_DSR
UART_CTS
UART_RFR
UART_DTR
UART_RI
GND
RS232_DCD
RS232_DSR
RS232_TXD
RS232_CTS
RS232_RXD
RS232_RTS
RS232_DTR
RS232_RI
GND
1
2
3
4
5
6
7
8
9
User Board
Female DB9
Note:UART_RFR is equal To UART_RTS.
The level of UART1_Rx and UART1_TX is 3.3V, the other pins of UART is
1.8V and needs the TTL level translator
UART_TXD
UART_RXD
Figure 45 The connection of ZM8620_V2 UART and Standard RS-232-C interface
4.7 SPI Interface
The SPI signal interface is used to control PCI voices. The SPI_CLK clock is 127.2kHz. Pin No: 3/5/6/7
are SPI control signals. Table 4-6 describes detailed definition for each signal. The system board side
needs to convert the power level of SPI_SDI (SPI control output signal cable on the system board side)
into 3.3V, to comply with the high power level VIH input requirements.
Table 46 Definition and Description of SPI Control Signal Group
PIN
Signal Name
I/O
Signal Description
3
SPI_SDI
I
SPI data signal, ZM8620_V2 input, input high power
level is VIH, and low power level is VIL.
5
SPI_SDO
O
SPI data signal, ZM8620_V2 output, input high power
level is VOH, and low power level is VOL.
6
SPI_CS
O
SPI chip select pin, ZM8620_V2 output, input high
power level is VOH, and low power level is VOL.
7
SPI_CLK
--
SPI synchronization clock, 100kHz, output by
ZM8620_V2, high power level is VOH, and low power
level is VOL.
NOTE:
VIH, VIL, VOH, and VOL comply with the power I/O interface power level requirements in 4.2.1.