SystemBase Quad UART with 16 Byte TX/RX FIFO, 68-pin PLCC - 54pcs Bundle
SB16C554A_PL68
Categories
Description
SB16C554A is an enhanced quadruple version of the 16C550 UART (Universal Asynchronous Receiver Transmitter). Each channel can be set as FIFO mode, reducing CPU overhead for I/O. Each channel performs serial-to-parallel conversion of the data received from the peripheral devices to CPU, or vice versa. The CPU can read all status of the UART at any time during the functional operation. The status information includes the type and condition of the transfer operations being performed by the UART as well as any error conditions such as parity, overrun, framing and break interrupt. With the complete modem-control capability and the interrupt system that can be programmed to the user's requirement, SB16C554A minimizes the computing required to handle the communication links.
Manuals
# | Title | Languages | Pages | Updated |
---|---|---|---|---|
1 | SB16C554_Product Introduction_EN | N/A | 2 | 2022-10-15 |