Parallel Programming Guide for HP-UX Systems

Introduction to parallel environments
HP SMP architectures
Chapter 1 9
HP SMP architectures
HP offers single-processor and symmetric multiprocessor (SMP) systems. SMP systems, those
that utilize different bus configurations for memory access, are discussed below.
Bus-based systems
The K-Class servers are midrange servers with a bus-based architecture. It contains one set of
processors and physical memory. Memory is shared among all the processors, with a bus
serving as the interconnect. The shared-memory architecture has a uniform access time from
each processor.
Hyperplane Interconnect systems
The V-Class servers configurations range from one to 16 processors on the V-Class single-node
system. These systems have the following characteristics:
• Processors communicate with each other through memory and by using I/O devices
through a Hyperplane Interconnect nonblocking crossbar.
• Scalable physical memory. The current V-Class server supports up to 16 Gbytes of
memory.
• Each process on an HP system can access a 16-terabyte (Tbyte) virtual address space.