Specifications

Chapter 2 - Microcontroller PIC16F84
Prescaler is accorded to timer TMR0, or to watchdog timer trough PSA bit in OPTION register. By
clearing PSA bit, prescaler will be accorded to timer TMR0. When prescaler is accorded to timer TMR0,
all instructions of writing to TMR0 register (CLRF TMR0, MOVWF TMR0, BSF TMR0,...) will clear
prescaler. When prescaler is assigned to a watchdog timer, only CLRWDT instruction will clear a
prescaler and watchdog timer at the same time . Prescaler change is completely under programmer's
control, and can be changed while program is running.
There is only one prescaler and one timer. Depending on the needs, they are assigned
either to timer TMR0 or to a watchdog.
OPTION Control Register
Bit 0:2 PS0, PS1, PS2 (Prescaler Rate Select bit)
The subject of a prescaler, and how these bits affect the work of a microcontroller will be covered in
section on TMR0.
bit 3 PSA (Prescaler Assignment bit)
Bit which assigns prescaler between TMR0 and watchdog timer.
1=prescaler is assigned to watchdog timer.
0=prescaler is assigned to free timer TMR0
bit 4 T0SE (TMR0 Source Edge Select bit)
If trigger TMR0 was enabled with impulses from a RA4/T0CKI pin, this bit would determine whether it
would be on the rising or falling edge of a signal.
1=falling edge
0=rising edge
bit 5 T0CS (TMR0 Clock Source Select bit)
This pin enables a free-run timer to increment its value either from an internal oscillator, i.e. every
1/4 of oscillator clock, or via external impulses on RA4/T0CKI pin.
1=external impulses
0=1/4 internal clock
bit 6 INTEDG (Interrupt Edge Select bit)
If occurrence of interrupts was enabled, this bit would determine at what edge interrupt on RB0/INT
pin would occur.
1= rising edge
0= falling edge
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