Data Sheet

Compute Module 3+ Datasheet

7.1 Supply Sequencing

Supplies should be staggered so that the highest voltage comes up ﬁrst, then the remaining voltages

in descending order. This is to avoid forward biasing internal (on-chip) diodes between supplies, and

causing latch-up. Alternatively supplies can be synchronised to come up at exactly the same time as

long as at no point a lower voltage supply rail voltage exceeds a higher voltage supply rail voltage.

7.2 Power Requirements

Exact power requirements will be heavily dependent upon the individual use case. If an on-chip subsys-

tem is unused, it is usually in a low power state or completely turned off. For instance, if your application

does not use 3D graphics then a large part of the core digital logic will never turn on and need power.

This is also the case for camera and display interfaces, HDMI, USB interfaces, video encoders and

decoders, and so on.

Powerchain design is critical for stable and reliable operation of the Compute Module 3+. We strongly

recommend that designers spend time measuring and verifying power requirements for their particular

use case and application, as well as paying careful attention to power supply sequencing and maximum

supply voltage tolerance.

Table 8 speciﬁes the recommended minimum power supply outputs required to power the Compute

Module 3+.

Supply Minimum Requirement Unit

VBAT (CM1) 2000

VBAT (CM3,3L) 3500

3V3 250 mA

1V8 250 mA

VDAC 25 mA

GPIO0-27 VDD 50

GPIO28-45 VDD 50

SDX VDD 50

Recommended minimum. Actual power drawn is very dependent on use-case

Each GPIO can supply up to 16mA, aggregate current per bank must not exceed 50mA

Table 8: Mimimum Power Supply Requirements

8 Booting

The eMMC Flash device on CM3+ is directly connected to the primary BCM2837 SD/eMMC interface.

These connections are not accessible on the module pins. On CM3+ Lite this SD interface is available

on the SDX pins.

14 Release 2