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EMAC Control Module Registers
3.2 EMAC Control Module Software Reset Register (CMSOFTRESET)
The software reset register (CMSOFTRESET) is shown in Figure 13 and described in Table 9.
Figure 13. EMAC Control Module Software Reset Register (CMSOFTRESET)
31 16
Reserved
R-0
15 1 0
Reserved SOFTRESET
R-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 9. EMAC Control Module Software Reset Register (CMSOFTRESET) Field Descriptions
Bit Field Value Description
31-1 Reserved 0 Reserved
0 SOFTRESET Software reset.
0 No effect.
1 Causes the EMAC control module logic to be reset. Software reset occurs on the clock following the
register bit write.
3.3 EMAC Control Module Emulation Control Register (CMEMCONTROL)
The emulation control register (CMEMCONTROL) is shown in Figure 14 and described in Table 10.
Figure 14. EMAC Control Module Emulation Control Register (CMEMCONTROL)
31 16
Reserved
R-0
15 2 1 0
Reserved SOFT FREE
R-0 R/W-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 10. EMAC Control Module Emulation Control Register (CMEMCONTROL)
Field Descriptions
Bit Field Value Description
31-2 Reserved 0 Reserved
1 SOFT Emulation soft bit. This bit is used in conjunction with FREE bit to determine the emulation suspend
mode. This bit has no effect if FREE = 1.
0 Soft mode is disabled. EMAC control module stops immediately during emulation halt.
1 Soft mode is enabled. During emulation halt, EMAC control module stops after completion of current
operation.
0 FREE Emulation free bit. This bit is used in conjunction with SOFT bit to determine the emulation suspend
mode.
0 Free-running mode is disabled. During emulation halt, SOFT bit determines operation of the EMAC
control module.
1 Free-running mode is enabled. During emulation halt, the EMAC control module continues to operate.
61
SPRUFI5B–March 2009–Revised December 2010 Ethernet Media Access Controller (EMAC)/Management Data Input/Output
(MDIO)
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