User Manual
WAKE_UP#3
PCI_RST#3,7,8,9
+VBAT
C134
0.1U_4_Y_16V
2
1
LPT_SLIN# 15
LPT_PE 15
LPT_AFD# 15
LPT_BUSY 15
LPT_ACK# 15
LPT_STB# 15
LPT_INIT# 15
LPT_ERR# 15
R175 @0_41 2
KB_RST# 3
KB_A20GATE 3
R348 10K_4_1%
t
RT1 @10K_6_1%
1 2
t
RT2 @10K_6_1%
1 2
R349 10K_4_1%
+V3.3
+V5
+V12
R352
@30K_4_1%
R353 10K_4_1%
R351
@10K_4_1%
R356 100K_4_1%
R354 10K_4_1%
C426
@3300P_4_X_50V
R357 10K_4_1%
R355 10K_4_1%
R358 10K_4_1%
+3.3VIN
FB31
FB80_6_600MA
R359
@10K_4_1%
VIN1
+5VIN
VIN2
VTIN1
VTIN3
"power use"
"system use"
HM_VREF
D-
+12VI N
D+
C136
0.1U_4_X_10V
2
1
C135
0.1U_4_X_10V
2
1
C137
0.1U_4_X_10V
2
1
C139
0.1U_4_X_10V
2
1
C138
0.1U_4_X_10V
2
1
R190 1K_4_1%
+V3.3
+V5
UART_TX2
UART_RX2
IR CONNECTOR
IR1
IR _5X1_2.54
1
3
4
5
2
C260
0.1U_4_Y _16V
D-
FDD_WE#15
FDD_HEAD#15
FDD_RWC#15
FDD_DIR#15
FDD_STEP#15
FDD_WD#15
FDD_DSA#15
FDD_RDATA#15
FDD_DSKCHG#15
FDD_MOA#15
FDD_INDEX#15
FDD_TRACK0#15
FDD_WP#15
R189 @1K_4_1%
Tit le
Size Document Number Rev
Date: Sheet
of
F119 ICE-DB-9S-R10
1.02
SIO(W83627EHG)
IEI ELECTRONICS INC.
NO. 29, Chung-Shing Rd.,
Shin-Chi City , Taipei Hsien. Taiwan, R. O.C
TEL:886-2-86916798
FAX:886-2-66160030
13 23Sunday , September 14, 2008
TP69
1
C427 0.1U_4_Y _16V
R187 @1K_4_1%
+V3.3
TP70
1
LPC_FRAME#3,5, 11,14,20
LPC_AD03,5,11,14, 20
LPC_AD23,5,11,14, 20
LPC_DRQ#03,11
LPC_AD13,5,11,14, 20
LPC_AD33,5,11,14, 20
CLK33M_LPC3
R180 4. 7K
Y1
OSC48MHZ_SMD
EN
1
GND
2
VDD
4
OUT
3
HM_VREF
VTIN3
+5VIN
+3.3VI N
+12VIN
VIN1
VIN2
R188 @1K_4_1%
MINICARD_DISABLE# 5
D+
TP67
1
Voltage Sensing
R174 10K_4
2E
TEST MODE
SIO_DIN3
ENABLE SPI ENABLE SPIDTR-A DISABLE SPI
4E
WDTO#
KBC ENABLE
VRM10 LEVELTTL LEVEL VID LEVEL SELECTION
KBC DISABLE
RTS-A
KBC FUNCTION ENABLESOUTA
I/O CONFIGURATION ADDRESS
SIO_DIN1
SIO_DOUT0
SIO_DOUT2
SIO_DOUT1
*
01
SIO_DIN0
SIO_DIN2
SIO_DIN3
SIO_DIN1
LPT_PD3
LPT_PD0
LPT_PD2
LPT_PD4
FAN_IO120
FAN_PWM220
FAN_IO220
CASEOPEN#
FAN_PWM120
LPT_PD6
LPT_PD1
IOAVCC
LPT_PD7
CLK48M_SIO1
LPT_PD5
SIO_SMI-
R179 33_412
+V3.3_DUAL
PM_PWRBTN# 3
PM_SLP_S3# 3
SERIRQ3,11,14
PANSWIN 21
+V3.3_D U AL
SIO_ DIN1
SIO_ DIN3
SIO_ DIN0
DIO1
HEADER_2X5_2.54
1
6
2
7
3
8
4
10
5
9
SIO_DOUT2
SIO_DOUT1
SIO_DOUT0
SIO_ DIN2
+V5
SIO_DOUT3
SIO_DOUT3
SIO_DOUT1
PS_ON# 21
PWR OK_SIO 3
RN21
2.7K_8P4R04
1 2
3 4
5 6
7 8
RN22
2.7K_8P4R04
1 2
3 4
5 6
7 8
*
SIO_DIN0
SIO_DIN2
W83627EHG
U13
W83627EHG_PQF P128
D
R
V
D
E
N
0
1
G
P
2
3
/
S
C
K
2
I
N
D
E
X
3
M
O
A
4
GP10/GPSA1
128
CPUTIN
103
SY STIN
104
VID5
105
VID4
106
VID3
107
VID2
108
VID1
109
VID0
110
AUXFANIN0
111
CPUFANIN0
112
SY SFANIN
113
AVCC3
114
CPUFANOUT0
115
SY SFANOUT
116
AGND
117
BEEP/SI
118
GP21/CPUFANIN1/MSI
119
GP20/CPUFANOUT1/MSO
120
GP17/GPSA2
121
GP16/GPSB2
122
GP15/GPY 1
123
GP14/GPY 2
124
GP13/GPX2
125
GP12/GPX1
126
GP11/GPSB1
127
H
M
_
S
M
I
/
O
V
T
5
D
S
A
6
A
U
X
F
A
N
O
U
T
0
7
D
I
R
8
S
T
E
P
9
W
D
1
0
W
E
1
1
V
C
C
3
_
1
1
2
T
R
A
K
0
1
3
W
P
1
4
R
D
A
T
A
1
5
H
E
A
D
1
6
D
S
K
C
H
G
1
7
I
O
C
L
K
1
8
G
P
2
2
/
S
C
E
1
9
V
S
S
_
1
2
0
P
C
I
C
L
K
2
1
L
D
R
Q
2
2
S
E
R
I
R
Q
2
3
L
A
D
3
2
4
L
A
D
2
2
5
L
A
D
1
2
6
L
A
D
0
2
7
V
C
C
3
_
2
2
8
L
F
R
A
M
E
2
9
L
R
E
S
E
T
3
0
S
L
C
T
3
1
P
E
3
2
B
U
S
Y
3
3
A
C
K
3
4
P
D
7
3
5
P
D
6
3
6
P
D
5
3
7
P
D
4
3
8
PD3
39
PD2
40
PD1
41
PD0
42
SLIN
43
INIT
44
ERR
45
AFD
46
STB
47
VCC3_3
48
CTSA/GP67
49
DSRA/GP66
50
RTSA/GP65/ H EFR AS
51
DTRA/GP64/PENROM
52
SIN A/GP63
53
SOUTA/GP62/PENKBC
54
VSS_2
55
DCDA/GP61
56
RIA/GP60
57
SO/AUXFANIN1
58
GA20M
59
KBRST
60
3VSB
61
KCLK/GP27
62
KDAT/GP26
63
GP37
64
M
C
L
K
6
5
M
D
A
T
/
G
P
2
4
6
6
P
S
O
U
T
/
G
P
5
7
6
7
P
S
I
N
/
G
P
5
6
6
8
G
P
3
6
6
9
G
P
5
5
/
S
U
S
L
E
D
7
0
P
W
R
O
K
/
G
P
5
4
7
1
P
S
O
N
/
G
P
5
3
7
2
S
U
S
B
/
G
P
5
2
7
3
V
B
A
T
7
4
R
S
M
R
S
T
/
G
P
5
1
7
5
C
A
S
E
O
P
E
N
7
6
G
P
5
0
/
W
D
T
O
/
E
N
_
V
R
M
1
0
7
7
C
T
S
B
/
G
P
4
7
7
8
D
S
R
B
/
G
P
4
6
7
9
R
T
S
B
/
G
P
4
5
8
0
D
T
R
B
/
G
P
4
4
8
1
S
I
N
B
/
I
R
R
X
8
2
S
O
U
T
B
/
I
R
T
X
8
3
D
C
D
B
/
G
P
4
1
8
4
R
I
B
/
G
P
4
0
8
5
P
M
E
8
6
G
P
3
5
8
7
G
P
3
4
/
R
S
T
O
U
T
4
8
8
S
D
A
/
G
P
3
3
/
R
S
T
O
U
T
3
8
9
S
C
L
/
G
P
3
2
/
R
S
T
O
U
T
2
9
0
G
P
3
1
9
1
G
P
3
0
9
2
R
S
T
O
U
T
1
9
3
R
S
T
O
U
T
0
9
4
V
I
N
4
9
5
V
I
N
3
9
6
V
I
N
2
9
7
V
I
N
1
9
8
V
I
N
0
9
9
C
P
U
V
C
O
R
E
1
0
0
V
R
E
F
1
0
1
A
U
X
T
I
N
1
0
2
WDTO : 6F02
DIO in : 6F08
DIO out : 6F09
+V5
SIO_DOUT3
*
LPT_SLCT 15
+V3.3
+V5
+V3.3
R177 1K_4_1%
R176 4. 7K_4
SIO_DOUT2
SIO_WDT# 21
SIO_DOUT0
SUS_LED
R178
10K_4
+V3.3_DUAL
+V3.3
R173 10M_4
*
R184 1K_4_1%
*
SUS_LED DISABLE ENABLE
R183 @1K_4_1%
UART_DSR#1 15
UART_RX1 15
UART_DCD#1 15
UART_CTS#1 15
UART_DTR#1 15
UART_TX1 15
UART_RI#1 15
UART_RTS#1 15
UART_RX216
UART_DCD#216
UART_CTS#216
UART_DTR#216
UART_TX216
UART_DSR#216
UART_RI#216
UART_RTS#216
+VBAT
Temperature Sensing for Future(Reserve)
PM_PWRBTN#
R172 @10K_4
+V3.3_DUAL
R185 1K_4_1%
+V3.3
R186 @1K_4_1%
UART_TX1
R182 @1K_4_1%R181 1K_4_1%
+V3.3
+V3.3
SIO_WDT#
SUS_LED
UART_RTS#1
+V3.3_D U AL
+V3.3
UART_DTR#1
LPT_PD[7..0] 15
LPT_PD[7..0]
VTIN1
KB_CLK# 15
MS_D A T# 15
MS_CLK# 15
KB_DAT# 15
FB32
FB80_6_600MA
D-