User`s guide

Polling Mode
10-5
Polling means that the kernel waits in an empty while loop until the time at
which the next model step has to be executed is reached. Then the next model
step is executed. At least a counter implemented in hardware has to be
accessible by the kernel in order to get a base reference for when the next model
step execution has to commence. The kernel polls this hardware counter. If this
hardware counter must be outside the CPU, e.g., in the chip set or even on an
ISA or PCI board, the counter value can only be retrieved by an I/O or memory
access cycle that again introduces latency. This latency usually eats up the
freed-up time of polling mode. Fortunately, since the introduction of the
Pentium CPU family from Intel, the CPU is equipped with a 64 bit counter on
the CPU substrate itself, which commences counting at power-up time and
counts up driven by the actual clock rate of the CPU. Even a highly clocked
CPU is not likely to lead to an overflow of a 64 bit counter (2^64 * 1e-9 (1 GHz
CPU) = 584 years). The Pentium counter comes with the following features:
•
Accurate measurements — Because the counter counts up with the CPU
clock rate (~1 GHz nowadays), the accuracy of time measurements even in
the microsecond range is very high, therefore leading to very small absolute
real-time errors.
•
No overflow — Because the counter is 64 bits wide, in practical use overflow
does not occur, which makes a CPU time expensive overflow handler
unnecessary.
•
No latency — The counter resides on the CPU. Reading the counter value
can be done within one CPU cycle, introducing almost no latency.
The polling execution scheme does not depend on any interrupt source to notify
the code to continue calculating the next model step. While this frees the CPU,
it means that any code that is part of the exclusively running polling loop is
executed in real time, even components, which have so far been executed in
background tasks. Because these background tasks are usually non-real-time
tasks and can use a lot of CPU time, do not execute them. This is the main
disadvantage of polling mode. To be efficient, only the target application’s
relevant parts should be executed. In the case of xPC Target, this is the code
that represents the Simulink model itself.
Therefore, host-target communication and target display updating are
disabled. Because polling mode reduces the features of xPC Target to a
minimum, you should choose it only as the last possible alternative to reach the
required base sample time for a given model. Therefore, ensure the following
before you consider polling mode: