Microprocessor User's Manual

104 Rabbit 3000 Microprocessor
Table 7-17. PWM LSB x Register
PWM LSB x Register (PWL0R) (Address = 0x88)
(PWL1R) (Address = 0x8A)
(PWL2R) (Address = 0x8C)
(PWL3R) (Address = 0x8E)
Bit(s) Value Description
7:6 write The least significant two bits for the Pulse Width Modulator count are stored.
5:1 These bits are ignored.
0 0 PWM output High for single block.
1 Spread PWM output throughout the cycle.
Table 7-18. PWM MSB x Register
PWM MSB x Register (PWM0R) (Address = 0x89)
(PWM1R) (Address = 0x8B)
(PWM2R) (Address = 0x8D)
(PWM3R) (Address = 0x8F)
Bit(s) Value Description
7:0 write
The most significant eight bits for the Pulse Width Modulator count are stored.
With a count of "n", the PWM output will be High for "n + 1" clocks out of the
1024 clocks of the PWM counter.
n=255, normal
n=256, spread
n=255, spread
(256 counts)
(64 counts) (64 counts) (64 counts) (64 counts)
(65 counts) (64 counts) (64 counts) (64 counts)
n=257, spread (65 counts) (64 counts) (65 counts) (64 counts)
n=258, spread (65 counts) (65 counts) (65 counts) (64 counts)
n=259, spread (65 counts) (65 counts) (65 counts) (65 counts)
n=259, normal (260 counts)