MicroBlaze Processor Reference Guide www.xilinx.com 131
UG081 (v6.0) June 1, 2006 1-800-255-7778
Instructions
R
rted
Return from Exception
Description
Return from exception will branch to the location specified by the contents of rA plus the
IMM field, sign-extended to 32 bits. The instruction will also enable exceptions after
execution.
This instruction always has a delay slot. The instruction following the RTED is always
executed before the branch target.
Pseudocode
PC (rA) + sext(IMM)
allow following instruction to complete execution
MSR[EE] 1
MSR[EIP] 0
ESR 0
Registers Altered
PC
MSR[EE]
MSR[EIP]
ESR
Latency
2 cycles
Note
Convention is to use general purpose register r17 as rA. This instruction requires that one
or more of the MicroBlaze parameters C_*_EXCEPTION are set to 1.
A delay slot must not be used by the following: IMM, branch, or break instructions. This
also applies to instructions causing recoverable exceptions (e.g. unalignement), when
hardware exceptions are enabled. Interrupts and external hardware breaks are deferred
until after the delay slot branch has been completed.
rted rA, IMM
1 0 1 1 0 1 1 0 1 0 0 rA IMM
0 6 11 16 31